ICE=0, CLO=0, IICRST=0, SOWP=0, SCLI=0, SCLO=0, SDAI=0, SDAO=0
I2C Bus Control Register 1
| SDAI | SDA Line Monitor 0 (0): SDA0 line is low 1 (1): SDA0 line is high |
| SCLI | SCL Line Monitor 0 (0): SCL0 line is low 1 (1): SCL0 line is high |
| SDAO | SDA Output Control/Monitor 0 (0): Read: IIC drives SDA0 pin low Write: IIC drives SDA0 pin low 1 (1): Read: IIC releases SDA0 pin Write: IIC releases SDA0 pin |
| SCLO | SCL Output Control/Monitor 0 (0): Read: IIC drives SCL0 pin low Write: IIC drives SCL0 pin low 1 (1): Read: IIC releases SCL0 pin Write: IIC releases SCL0 pin |
| SOWP | SCLO/SDAO Write Protect 0 (0): Write enable SCLO and SDAO bits 1 (1): Write protect SCLO and SDAO bits |
| CLO | Extra SCL Clock Cycle Output 0 (0): Do not output extra SCL clock cycle (default) 1 (1): Output extra SCL clock cycle |
| IICRST | I2C Bus Interface Internal Reset 0 (0): Release IIC reset or internal reset 1 (1): Initiate IIC reset or internal reset |
| ICE | I2C Bus Interface Enable 0 (0): Disable (SCL0 and SDA0 pins in inactive state) 1 (1): Enable (SCL0 and SDA0 pins in active state) |